A clear trend in modern telecommunication receiver architectures is the implementation of an increasing number of receiver functionalities in the digital domain. This poses serious challenges in the Analog to Digital (ND) converter (ADC) design because of the increasing resolution and sampling frequency needed to correctly convert the broadband signals at the output of the RF blocks (LNAs or mixers). Moreover, these high performance ND converters are often integrated together with the digital baseband hardware and therefore have to be implemented in scaled CMOS technologies. The reduced voltage supply and the degradation of the intrinsic gain of the devices of modern technologies call for ND architectures that do not rely on high precision analog blocks for their operations.
Among these, the Successive Approximation Register (SAR) scheme stands as a promising candidate because it allows high power efficiency to be achieved while minimizing the amount of required analog hardware. In combination with the time Interleaving technique, SAR ND converters can be used to realize high speed and high resolution A/D converters with excellent power efficiency.
US2011133971 (A1) describes a SAR ADC including a digital-to-analog converter, a first comparator that compares an input analog signal with a reference analog signal, a second comparator that compares an input analog signal with a reference analog signal, a selection circuit that selects one of comparison results of the first comparator and the second comparator, and a control circuit that changes the multibit digital signal sequentially based on the selected comparison result in a plurality of steps so that the reference analog signal becomes closer to the input analog signal, and the control circuit controls the selection circuit to select the comparison result of the first comparator up to an intermediate step on the way of the plurality of steps and to select the comparison result of the second comparator after the intermediate step, and changes the bit value of the multibit digital signal according to the non-binary algorithm.